ACQ08E SDSXD-128G-000000
我的供应链 询价历史 我的订单
全部商品分类
产品分类 > 开发工具/系统 > 系统设计与验证 > C-to-Silicon Compiler

可能感兴趣的商品

最近浏览过的商品

pic

C-to-Silicon Compiler

厂商：
Cadence
类别：
系统设计与验证
包装：
-
封装：
-
无铅情况/ROHS：
-
描述：
新一代的高阶综合技术，能从有时序或无时序的C/C++/System...

我要询价我要收藏

  • 参数
  • 描述
  • 文档
参数 数值

特点
Step-Up/Step-Down Charge Pump Generates 5V
Input Voltage Range: 2.7V to 10V
Output Current: 10mA (V IN >/= 2.7V) 20mA (V IN >/=3V)
3V to 5V Signal Level Translators
>10kV ESD on All SIM Contact Pins
Short-Circuit and Overtemperature Protected
Very Low Operating Current: 60μA
Very Low Shutdown Current: <1μA
Soft Start Limits Inrush Current at Turn-On
Programmable 3V or 5V Output Voltage
650kHz Switching Frequency
Auxiliary 4.3V LDO/Power Switch (LTC1556 Only)
Available in a 16- and 20-Pin Narrow SSOP

典型应用

描述
A soft start feature limits inrush current at turn-on, mitigating start-up problems that may result when the input is supplied by another low power DC/DC converter. The LTC1556 also includes an auxiliary LDO regulator/power switch that may be used to power the frequency synthesizer or other low power circuitry.
Battery life is maximized by 60μA operating current and 1μA shutdown current. Board area is minimized by miniature 16- and 20-pin narrow SSOP packages and the need for only three small external capacitors.

请选择文档类型：
Article
文档名称 文档类型 软件 描述
C-to-Silicon CompilerPDF下载 点击下载 点击下载 Case study: High-Level Synthesis – Ready for prime-time?
Book
文档名称 文档类型 软件 描述
C-to-Silicon CompilerPDF下载 点击下载 点击下载 TLM-Driven Design and Verification Methodology Book
Datasheet
文档名称 文档类型 软件 描述
C-to-Silicon CompilerPDF下载 点击下载 点击下载 Cadence C-to-Silicon Compiler Datasheet
Demo
文档名称 文档类型 软件 描述
C-to-Silicon CompilerPDF下载 点击下载 点击下载 Next-generation High Level Synthesis: Cadence C-to-Silicon Compiler Demo
Success Story
文档名称 文档类型 软件 描述
C-to-Silicon CompilerPDF下载 点击下载 点击下载 Cadence and Casio Success Story
C-to-Silicon CompilerPDF下载 点击下载 点击下载 Cadence and Renesas System Design and Verification Success Story
C-to-Silicon CompilerPDF下载 点击下载 点击下载 Technical University of Braunschweig and Cadence Success Story
Technical Paper
文档名称 文档类型 软件 描述
C-to-Silicon CompilerPDF下载 点击下载 点击下载 Cadence C-to-Silicon Compiler Delivers on the Promise of High-Level Synthesis Technical Paper
Webinar
文档名称 文档类型 软件 描述
C-to-Silicon CompilerPDF下载 点击下载 点击下载 Archived webinar - Calypto: Application of Sequential Analysis for ESL Methodology Adoption
C-to-Silicon CompilerPDF下载 点击下载 点击下载 Archived webinar - CircuitSutra: Role of Standards in TLM Driven Design and Verification Methodology
C-to-Silicon CompilerPDF下载 点击下载 点击下载 Archived webinar - Magillem: Role of IP-XACT in TLM
C-to-Silicon CompilerPDF下载 点击下载 点击下载 Archived webinar - TLM-Driven Design and Verification Solution and Methodology
C-to-Silicon CompilerPDF下载 点击下载 点击下载 Archived webinar - TSMC Reference Flow 11: ESL Focus on High-Level Synthesis
C-to-Silicon CompilerPDF下载 点击下载 点击下载 Archived webinar - TSMC Reference Flow 11: ESL Focus on TLM Design and Verification Methodology
C-to-Silicon CompilerPDF下载 点击下载 点击下载 Archived webinar - XtremeEDA: The Importance of a Complete Methodology for ESL
C-to-Silicon CompilerPDF下载 点击下载 点击下载 Practical application of high-level synthesis in SoC designs on-demand webinar
White Paper
文档名称 文档类型 软件 描述
C-to-Silicon CompilerPDF下载 点击下载 点击下载 TLM-Driven Design and Verification – Time for a Methodology Shift White Paper
Copyright©2017 solecsy.com. All Rights Reserved    粤ICP备07509311号   软件企业认定证书 国家级高新技术企业称号 本站由速网科技提供CDN加速
版权所有：深圳市搜了网络科技股份有限公司