Description
The W9412G2IB is a 128M GDDR SDRAM and speed involving -4/-5/-5I/-6/-6I Status: Mass Production
Features
2.5V ±0.2V Power Supply for DDR 333/400
2.5V ±0.1V Power Supply for DDR500
Up to 250 MHz Clock Frequency
Double Data Rate architecture; two data transfers per clock cycle
Differential clock inputs (CLK and /CLK )
DQS is edge-aligned with data for Read; center-aligned with data for Write?
CAS Latency: 2, 2.5, 3 and 4?
Burst Length: 2, 4 and 8
Auto Refresh and Self Refresh
Precharged Power Down and Active Power Down?
Write Data Mask?
Write Latency = 1?
15.6μS Refresh interval (4K/64 mS Refresh)?
Maximum burst refresh cycle: 8
?Interface: SSTL_2