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LTC3546IFE#TRPBF

厂商:
Linear
类别:
DC/DC控制器
包装:
Tape & Reel (TR)
封装:
28-TSSOP
无铅情况/ROHS:
无铅
描述:
双通道、同步、3A/1A 或 2A/2A 可配置降压型 DC/DC...

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  • 参数
  • 描述
  • 文档
参数 数值
内部开关 Yes
同步整流器 Yes
开关频率 2.25MHz, 0.75MHz ~ 4MHz
输出数 2
输入电压 2.25 ~ 5.5 V
输出电压 0.6 ~ 5 V
输出电流 1A, 2A
工作温度 -40°C ~ 125°C
安装类型 Surface Mount
类型 Step-Down (Buck)
Number of Outputs 2
Vin Min (V) 2.25
Vin Max (V) 5.5
Output Current (A) 2
Vout Min (V) 0.6
Frequency (kHz) 2250
Synchronous (yes/no) yes
Packages QFN-28, TSSOP-28
Features Burst Mode, Resistor Set Frequency, External Synchronization, Power Good, Soft Start, Tracking
Isupply (mA) 0.16
Ishutdown (uA) 0.2
Monolithic (yes/no) yes
Tracking (yes/no) yes
Integrated Inductor (yes/no) no
Switch Current (A) 3.2
Topology Buck
Architecture Constant Frequency Current Mode
Vout Max (V) 5
Vout Maximum Vin
Frequency Adjust Range 750kHz - 4MHz
Frequency Sync Range 750kHz - 4MHz
Extended Temp E, I
Comments Dual Synchronous, 3A/1A or 2A/2A Configurable Step-Down DC/DC Regulator
Featured no
Date Added 2009-01-22
Price 1k * $3.90 (LTC3546EFE#PBF)
New no

The MPC860 PowerQUICC is a versatile one-chip integrated microprocessor and peripheral combination that can be used in a variety of controller applications, excelling particularly in communications and networking products.

The PowerQUICC can be described as a next-generation MC68360 QUICC for network and data communication applications, providing higher performance in all areas of device operation including flexibility, extensions in capability, and integration.

The MPC860 PowerQUICC, like the MC68360 QUICC, integrates two processing blocks. One block is the embedded MPC8xx core and the second block is a Communication Processor Module (CPM) that closely resembles the MC68360 CPM. The CPM supports four serial communications controllers (SCCs) on the device; however, there are actually eight serial channels—four SCCs, two serial management controllers (SMCs), one serial peripheral interface (SPI) and one I2C interface. This dual-processor architecture provides lower power consumption than traditional architectures because the CPM off-loads peripheral tasks from the embedded MPC8xx core.

View Product Image View Block Diagram

Features

  • 4Kb Instruction Cache; MPC860P - 16Kb Instruction Cache
  • 4Kb Data Cache; MPC860P - 8Kb Data Cache
  • 8Kb Dual Port RAM
  • Instruction and Data MMUs
  • Up to 32-Bit Data Bus (Dynamic Bus Sizing for 8,16, and 32 Bits)
  • 32 Address Lines
  • Complete Static Design (040 MHz Operation)
  • Memory Controller (Eight Banks)
  • General-Purpose Timers
  • System Integration Unit (SIU)
  • Interrupts
  • Communications Processor Module (CPM)
  • Four Baud Rate Generators
  • Four SCCs (Serial Communication Controllers)
  • Two SMCs (Serial Management Channels)
  • One SPI (Serial Peripheral Interface)
  • One I2C (Inter-Integrated Circuit) Port
  • Time-Slot Assigner
  • Parallel Interface Port
  • PCMCIA Interface
  • Low Power Support
  • Debug Interface
  • 3.3 V Operation with 5V TTL Compatibility

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