The MPC561 is a high-speed 32-bit control unit that combines high-performance data manipulation capabilities with powerful peripheral subsystems. This MCU is built up from standard modules that interface through a common intermodule bus (IMB).
Features
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Precise exception model
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Floating point
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Extensive system development support
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On-chip watchpoints and breakpoints
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Background debug mode (BDM)
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IEEE®-ISTO 5001-1999 NEXUS class 3 debug interface
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True 5-volt I/O
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Two time processing units (TPU3) with 8 KB DPTRAM
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22-channel MIOS timer (MIOS14)
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Two queued analog-to-digital converter modules (QADC64_A, QADC64_B) providing a total of 32 analog channels
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Three TouCAN modules (TOUCAN_A, TOUCAN_B, TOUCAN_C)
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One queued serial module with one queued SPI and two SCIs (QSMCM) 32 KB static RAM (CALRAM)
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