The MPC857T PowerQUICC™ Integrated Communications Processor is a versatile one-chip integrated microprocesor and peripheral combination that can be used in a variety of controller applications. It particularly excels in both communications and networking systems.
The MPC857T is a Power Architecture-based derivative of Freescale Semiconductor's MPC860 PowerQUICC™ Integrated Communications Processor. The embedded CPU on the MPC859T is a 32-bit processor (the MPC8xx core) built on Power Architecture technology that incorporates memory management units (MMUs) and instruction and data caches. The communications processor module (CPM) from the MPC860 PowerQUICC has been enhanced by the addition of the inter-integrated controller (I2C) channel. The memory controller has been enhanced, enabling the MPC857T to support any type of memory, including high-performance memories and new types of DRAMs. A PCMCIA socket controller supports up to two sockets. A real-time clock has also been integrated.
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Features
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Embedded MPC8xx core
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Single-issue, 32-bit version of the core (compatible with the Power Architecture definition) with 32, 32-bit general-purpose registers (GPRs)
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The MPC857T provides enhanced ATM functionality over that of the MPC860SAR. The MPC857T adds major new features available in "enhanced SAR" (ESAR) mode, including the following:
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Multiple APC priority levels available to support a range of traffic pace requirements
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Port-to-port switching capability without the need for RAM-based microcode
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Simultaneous MII (100Base-T) and UTOPIA (half-duplex) capability
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Parameter RAM for both SPI and I2C can be relocated without RAM-based microcode
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Supports full-duplex UTOPIA master (ATM side) operation using a "split" bus
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Up to 32-bit data bus (dynamic bus sizing for 8, 16, and 32 bits)
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32 address lines
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Complete static design
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Memory controller (eight banks)
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General-purpose timers
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Fast Ethernet controller (FEC)
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System integration unit (SIU)
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Interrupts
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Communications processor module (CPM)
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Four baud rate generators
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One SCC (serial communication controller)
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Two SMCs (serial management channels)
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One SPI (serial peripheral interface)
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One I2C (inter-integrated circuit) port
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Time-slot assigner (TSA)
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Parallel interface port (PIP)
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PCMCIA interface
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Low power support
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Debug interface
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3.3 V operation
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357-pin ball grid array (BGA) package