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MPC859PZP100A

厂商:
Freescale
类别:
PowerQUICC
包装:
Tray
封装:
PBGA-FW 357 25SQ1.2P1.27
无铅情况/ROHS:
有铅
描述:
POWER QUICC I HIP6W

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  • 参数
  • 描述
  • 文档
参数 数值
电压 1.8V
Application/Qualification Tier COMMERCIAL, INDUSTRIAL
Export Control Classification Number (US) 3A991
Floor Life 168 HOURS
Life Cycle Description (code) PRODUCT STABLE GROWTH/MATURITY
Maximum Height Above Board (mm) 2.520
Maximum Time at Peak Temperature (s) 30
Micron Size (μm) .16
Minimum Package Quantity (MPQ) 44
Moisture Sensitivity Level (MSL) 3
MPQ Container TRAY
Pin/Lead/Ball Count 357
POQ Container BOX
Sample Exception Availability Y
Tape & Reel No
Leadtime (weeks) 8
32-bit Product Family Power Architecture
Ambient Operating Temperature (Min-Max) (°C) 0 to 95
Bus Frequency (Max) (MHz) 50
Cache (kByte) 24
Co Processor Frequency (Max) (MHz) 100
Co Processor Type CPM
Core: Number of cores (Spec) 1
Core: Operating Frequency Max (Max) (MHz) 100
Core: Operating Voltage (Spec) (V) 1.8
Core: Performance in MIPS 132
Ethernet 100 BaseT / 10 BaseT
External Bus Interface PCMCIA
External Memory Supported EDO / EPROM / FLASH / SDRAM / SRAM
Halogen Free Yes
Harmonized Tariff (US) Disclaimer 8542.31.0000
I/O Operating Voltage (Max) (V) 3.3
Internal RAM (kByte) 8
Junction Operating Temperature (Max) (°C) 95
Material Composition Declaration (MCD) Download MCD Report Download MCD Report
Material Type Tested Packaged Device
Mounting Style Surface Mount
Number of Reflow Cycles 3
Package Material Plastic
Power Dissipation (Max) (W) 0.25
Power Dissipation (Typ) (W) 0.21
REACH SVHC Freescale REACH Statement
RoHS Certificate of Analysis (CoA) Contact Us
Timers - Channels 4
Total DMA Channels 10
安装类型 Surface Mount
处理器类型 MPC8xx PowerQUICC 32-Bit
Part Number MPC859PZP100A
Package Length (nominal) (mm) 25.000
Package Width (nominal) (mm) 25.000
Status Active
Budgetary Price($US) 100 @ $32.04 each
RoHS Compliant No
Pb-Free No
Preferred Order Quantity (POQ) 440
Peak Package Body Temperature (PPT)(°C) 220
UL94 (plastics flammability test) V0: burning stops within 10 seconds on a vertical specimen; no drips allowed
Description POWER QUICC I HIP6W
Package Description and Mechanical Drawing PBGA-FW 357 25SQ1.2P1.27
Device Weight (g) 2.26750
Package Thickness (nominal) (mm) 2.310
速度 100MHz
Device Production Availability 16 Mar 2005
Device Production Availability 14 Nov 2003
Communication Protocol Ethernet / UART / Transparent / TDM / PIP / PCMCIA / HDLC / GCI
Device Sample Availability 14 Nov 2003
Device Sample Availability 16 Mar 2005
Serial Interface - Type SCC / SMC / I2C / SPI / Ethernet
I/O Pins 59

The MPC859T Quad Integrated Communications Controller (PowerQUICC™) is a versatile one-chip integrated microprocessor and peripheral combination that can be used in a variety of controller applications. It particularly excels in both communications and networking systems.

The MPC859T is a Power Architecture-based derivative of Freescale Semiconductor's MC68360 Quad Integrated Communications Controller (QUICC™). The embedded CPU on the MPC859T is a 32-bit processor (the MPC8xx core) built on Power Architecture technology that incorporates memory management units (MMUs) and instruction and data caches. The communications processor module (CPM) from the MC68360 QUICC has been enhanced by the addition of the inter-integrated controller (I2C) channel. The memory controller has been enhanced, enabling the MPC859T to support any type of memory, including high-performance memories and new types of DRAMs. A PCMCIA socket controller supports up to two sockets. A real-time clock has also been integrated.


Features

  • Embedded MPC8xx core
  • Single-issue, 32-bit version of the core (compatible with the Power Architecture definition) with 32, 32-bit general-purpose registers (GPRs)
  • The MPC859T provides enhanced ATM functionality over that of the MPC860SAR. The MPC859T adds major new features available in "enhanced SAR" (ESAR) mode, including the following:
    • Multiple APC priority levels available to support a range of traffic pace requirements
    • Port-to-port switching capability without the need for RAM-based microcode
    • Simultaneous MII (100Base-T) and UTOPIA (half-duplex) capability
    • Parameter RAM for both SPI and I2C can be relocated without RAM-based microcode
    • Supports full-duplex UTOPIA master (ATM side) operation using a "split" bus
  • Up to 32-bit data bus (dynamic bus sizing for 8, 16, and 32 bits)
  • 32 address lines
  • Complete static design
  • Memory controller (eight banks)
  • General-purpose timers
  • Fast Ethernet controller (FEC)
  • System integration unit (SIU)
  • Interrupts
  • Communications processor module (CPM)
  • On-chip 16 x 16 multiply accumulate controller (MAC)
  • Four baud rate generators
  • One SCC (serial communication controller)
  • Two SMCs (serial management channels)
  • One SPI (serial peripheral interface)
  • One I2C (inter-integrated circuit) port
  • Time-slot assigner (TSA)
  • Parallel interface port (PIP)
  • PCMCIA interface
  • Low power support
  • Debug interface
  • 3.3 V operation
  • 357-pin PBGA package
Note 1: Where nn = 50, 66, 100, or 133

Packaging Information
文档名称 文档类型 软件 描述
MPC859PZP100APDF下载 点击下载 点击下载 PBGAPRES
Fact Sheets
文档名称 文档类型 软件 描述
MPC859PZP100APDF下载 点击下载 点击下载 USBMLPPCBDMFS
MPC859PZP100APDF下载 点击下载 点击下载 MPC866FACT
Application Notes
文档名称 文档类型 软件 描述
MPC859PZP100APDF下载 点击下载 点击下载 AN2800
MPC859PZP100APDF下载 点击下载 点击下载 AN3939
MPC859PZP100APDF下载 点击下载 点击下载 AN4056
MPC859PZP100APDF下载 点击下载 点击下载 AN2387
MPC859PZP100APDF下载 点击下载 点击下载 AN2348
MPC859PZP100APDF下载 点击下载 点击下载 AN2100
MPC859PZP100APDF下载 点击下载 点击下载 AN2557
Errata
文档名称 文档类型 软件 描述
MPC859PZP100APDF下载 点击下载 点击下载 MPC866CE
Product Briefs
文档名称 文档类型 软件 描述
MPC859PZP100APDF下载 点击下载 点击下载 MPC866TS
MPC859PZP100APDF下载 点击下载 点击下载 MPC859TTS
Reference Manuals
文档名称 文档类型 软件 描述
MPC859PZP100APDF下载 点击下载 点击下载 MPC8XXRMAD
MPC859PZP100APDF下载 点击下载 点击下载 MPC866UM
MPC859PZP100APDF下载 点击下载 点击下载 MPC866UMAD
Product Change Notices
文档名称 文档类型 软件 描述
MPC859PZP100APDF下载 点击下载 点击下载 PCN9165
Data Sheets
文档名称 文档类型 软件 描述
MPC859PZP100APDF下载 点击下载 点击下载 MPC866EC