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MPC859PZP133A

厂商:
Freescale
类别:
PowerQUICC
包装:
Tray
封装:
PBGA-FW 357 25SQ1.2P1.27
无铅情况/ROHS:
有铅
描述:
POWER QUICC I HIP6W

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  • 参数
  • 描述
  • 文档
参数 数值
速度 133MHz
处理器类型 MPC8xx PowerQUICC 32-Bit
电压 1.8V
安装类型 Surface Mount
Device Production Availability 20 Nov 2003
Minimum Package Quantity (MPQ) 44
Package Material Plastic
Package Thickness (nominal) (mm) 2.310
Co Processor Frequency (Max) (MHz) 133
Device Weight (g) 2.26750
I/O Operating Voltage (Max) (V) 3.3
Material Composition Declaration (MCD) Download MCD Report Download MCD Report
Serial Interface - Type SCC / SMC / I2C / SPI / Ethernet
RoHS Certificate of Analysis (CoA) Contact Us
Device Sample Availability 16 Mar 2005
Device Sample Availability 20 Nov 2003
External Bus Interface PCMCIA
Junction Operating Temperature (Max) (°C) 95
Leadtime (weeks) 8
Description POWER QUICC I HIP6W
Core: Performance in MIPS 176
Floor Life 168 HOURS
Harmonized Tariff (US) Disclaimer 8542.31.0000
Life Cycle Description (code) PRODUCT STABLE GROWTH/MATURITY
MPQ Container TRAY
32-bit Product Family Power Architecture
Export Control Classification Number (US) 3A991
Power Dissipation (Typ) (W) 0.26
Tape & Reel No
UL94 (plastics flammability test) V0: burning stops within 10 seconds on a vertical specimen; no drips allowed
Package Length (nominal) (mm) 25.000
Package Width (nominal) (mm) 25.000
POQ Container BOX
Device Production Availability 16 Mar 2005
I/O Pins 59
Timers - Channels 4
Core: Operating Voltage (Spec) (V) 1.8
REACH SVHC Freescale REACH Statement
Core: Number of cores (Spec) 1
Halogen Free Yes
Internal RAM (kByte) 8
Application/Qualification Tier COMMERCIAL, INDUSTRIAL
Communication Protocol Ethernet / UART / Transparent / TDM / PIP / PCMCIA / HDLC / GCI
Material Type Tested Packaged Device
Maximum Height Above Board (mm) 2.520
Pin/Lead/Ball Count 357
RoHS Compliant No
Budgetary Price($US) 100 @ $35.24 each
Co Processor Type CPM
Core: Operating Frequency Max (Max) (MHz) 133
Moisture Sensitivity Level (MSL) 3
Number of Reflow Cycles 3
Peak Package Body Temperature (PPT)(°C) 220
Total DMA Channels 10
Ethernet 100 BaseT / 10 BaseT
Bus Frequency (Max) (MHz) 66
External Memory Supported EDO / EPROM / FLASH / SDRAM / SRAM
Micron Size (μm) .16
Package Description and Mechanical Drawing PBGA-FW 357 25SQ1.2P1.27
Pb-Free No
Status Active
Ambient Operating Temperature (Min-Max) (°C) 0 to 95
Cache (kByte) 24
Maximum Time at Peak Temperature (s) 30
Preferred Order Quantity (POQ) 440
Sample Exception Availability Y
Part Number MPC859PZP133A
Mounting Style Surface Mount
Power Dissipation (Max) (W) 0.32

The MPC859T Quad Integrated Communications Controller (PowerQUICC™) is a versatile one-chip integrated microprocessor and peripheral combination that can be used in a variety of controller applications. It particularly excels in both communications and networking systems.

The MPC859T is a Power Architecture-based derivative of Freescale Semiconductor's MC68360 Quad Integrated Communications Controller (QUICC™). The embedded CPU on the MPC859T is a 32-bit processor (the MPC8xx core) built on Power Architecture technology that incorporates memory management units (MMUs) and instruction and data caches. The communications processor module (CPM) from the MC68360 QUICC has been enhanced by the addition of the inter-integrated controller (I2C) channel. The memory controller has been enhanced, enabling the MPC859T to support any type of memory, including high-performance memories and new types of DRAMs. A PCMCIA socket controller supports up to two sockets. A real-time clock has also been integrated.


Features

  • Embedded MPC8xx core
  • Single-issue, 32-bit version of the core (compatible with the Power Architecture definition) with 32, 32-bit general-purpose registers (GPRs)
  • The MPC859T provides enhanced ATM functionality over that of the MPC860SAR. The MPC859T adds major new features available in "enhanced SAR" (ESAR) mode, including the following:
    • Multiple APC priority levels available to support a range of traffic pace requirements
    • Port-to-port switching capability without the need for RAM-based microcode
    • Simultaneous MII (100Base-T) and UTOPIA (half-duplex) capability
    • Parameter RAM for both SPI and I2C can be relocated without RAM-based microcode
    • Supports full-duplex UTOPIA master (ATM side) operation using a "split" bus
  • Up to 32-bit data bus (dynamic bus sizing for 8, 16, and 32 bits)
  • 32 address lines
  • Complete static design
  • Memory controller (eight banks)
  • General-purpose timers
  • Fast Ethernet controller (FEC)
  • System integration unit (SIU)
  • Interrupts
  • Communications processor module (CPM)
  • On-chip 16 x 16 multiply accumulate controller (MAC)
  • Four baud rate generators
  • One SCC (serial communication controller)
  • Two SMCs (serial management channels)
  • One SPI (serial peripheral interface)
  • One I2C (inter-integrated circuit) port
  • Time-slot assigner (TSA)
  • Parallel interface port (PIP)
  • PCMCIA interface
  • Low power support
  • Debug interface
  • 3.3 V operation
  • 357-pin PBGA package
Note 1: Where nn = 50, 66, 100, or 133

Errata
文档名称 文档类型 软件 描述
MPC859PZP133APDF下载 点击下载 点击下载 MPC866CE
Product Briefs
文档名称 文档类型 软件 描述
MPC859PZP133APDF下载 点击下载 点击下载 MPC859TTS
MPC859PZP133APDF下载 点击下载 点击下载 MPC866TS
Reference Manuals
文档名称 文档类型 软件 描述
MPC859PZP133APDF下载 点击下载 点击下载 MPC866UMAD
MPC859PZP133APDF下载 点击下载 点击下载 MPC866UM
MPC859PZP133APDF下载 点击下载 点击下载 MPC8XXRMAD
Fact Sheets
文档名称 文档类型 软件 描述
MPC859PZP133APDF下载 点击下载 点击下载 MPC866FACT
MPC859PZP133APDF下载 点击下载 点击下载 USBMLPPCBDMFS
Application Notes
文档名称 文档类型 软件 描述
MPC859PZP133APDF下载 点击下载 点击下载 AN2100
MPC859PZP133APDF下载 点击下载 点击下载 AN2557
MPC859PZP133APDF下载 点击下载 点击下载 AN2387
MPC859PZP133APDF下载 点击下载 点击下载 AN2800
MPC859PZP133APDF下载 点击下载 点击下载 AN4056
MPC859PZP133APDF下载 点击下载 点击下载 AN3939
MPC859PZP133APDF下载 点击下载 点击下载 AN2348
Packaging Information
文档名称 文档类型 软件 描述
MPC859PZP133APDF下载 点击下载 点击下载 PBGAPRES
Product Change Notices
文档名称 文档类型 软件 描述
MPC859PZP133APDF下载 点击下载 点击下载 PCN9165
Data Sheets
文档名称 文档类型 软件 描述
MPC859PZP133APDF下载 点击下载 点击下载 MPC866EC