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XPC8260CVVHFBC

厂商:
Freescale
类别:
PowerQUICC II
包装:
Tray
封装:
TBGA 480 37.5SQ*1.7P1.27
无铅情况/ROHS:
无铅
描述:
PQ 2 HIP 3 NO-PB

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  • 参数
  • 描述
  • 文档
参数 数值
电压 2.5V
2nd Level Interconnect e1
32-bit Product Family Power Architecture
Ambient Operating Temperature (Min-Max) (°C) -40 to 105
Application/Qualification Tier COMMERCIAL, INDUSTRIAL
Cache (kByte) 32
Co Processor Frequency (Max) (MHz) 133
Co Processor Type CPM
Core: Number of cores (Spec) 1
Core: Operating Frequency Max (Max) (MHz) 166
Core: Operating Voltage (Spec) (V) 2.5
Core: Performance in MIPS 315.4
Core: Type 603e
Device Type MPU
Ethernet 100 BaseT
Export Control Classification Number (US) 5A991
External Bus Interface 60x / Local / PCI
External Memory Supported SRAM / SDRAM / FLASH / EPROM / DRAM
Floor Life 168 HOURS
Harmonized Tariff (US) Disclaimer 8542.31.0000
I/O Operating Voltage (Max) (V) 3.3
Junction Operating Temperature (Max) (°C) 105
Leadtime (weeks) 8
Life Cycle Description (code) NOT RECOMMENDED(DECLINING)
Material Composition Declaration (MCD) Download MCD Report Download MCD Report
Material Type Tested Packaged Device
Maximum Height Above Board (mm) 1.650
Maximum Time at Peak Temperature (s) 30
Micron Size (μm) .3
Minimum Package Quantity (MPQ) 21
Moisture Sensitivity Level (MSL) 3
Mounting Style Surface Mount
MPQ Container TRAY
Number of Reflow Cycles 3
Package Material Plastic
Pin/Lead/Ball Count 480
POQ Container BOX
Power Dissipation (Max) (W) 3.02
Power Dissipation (Typ) (W) 2.62
REACH SVHC Freescale REACH Statement
RoHS Certificate of Analysis (CoA) Contact Us
Sample Exception Availability N
Tape & Reel No
安装类型 Surface Mount
处理器类型 MPC82xx PowerQUICC II 32-bit
速度 166MHz
Status Not Recommended for New Design
Part Number XPC8260CVVHFBC
Package Length (nominal) (mm) 37.500
Package Width (nominal) (mm) 37.500
Serial Interface - Type Ethernet
Preferred Order Quantity (POQ) 105
Budgetary Price($US) 100 @ $126.64 each
Description PQ 2 HIP 3 NO-PB
Device Weight (g) 10.06085
Device Sample Availability 19 Jul 2005
Peak Package Body Temperature (PPT)(°C) 245
Package Thickness (nominal) (mm) 1.700
Package Description and Mechanical Drawing TBGA 480 37.5SQ*1.7P1.27
Device Production Availability 19 Jul 2005
Communication Protocol Ethernet

The MPC8240 Integrated Host Processor fits applications where cost, space, power consumption and performance are critical requirements. This device provides a high level of integration, reducing chip count from five discrete chips to one, thereby significantly reducing system component cost. High integration results in a simplified board design, less power consumption and faster time-to-market solution. This cost-effective, general-purpose integrated processor targets systems using PCI interfaces in networking infrastructure, telecommunications, and other embedded markets. It can be used for control processing in applications such as routers, switches, network storage applications and image display systems.

Processor Core 

The MPC8240 Integrated Host Processor takes advantage of a small, yet powerful 32-bit, superscalar MPC603e processor core. The processor core provides floating-point support, memory management, 16-Kbyte instruction and data caches and power management features with five independent execution units. This full-featured high-performance processor core is software-compatible with microprocessors based on Power Architecture.

View Product Image View Block Diagram

Features

  • 32-bit PCI interface operating at up to 66 MHz
  • Memory controller offering SDRAM support up to 100 MHz operation
  • General Purpose I/O and ROM Interface Support
  • Two-channel DMA controller that supports chaining
  • Messaging unit with I2O messaging support capability
  • Industry-standard I2C interface
  • Programmable interrupt controller with multiple timers and counters
  • Routers/Switches
  • Multi-channel modems
  • Network storage
  • Image display systems
  • Enterprise I/O processor
  • Internet access device (IAD)
  • Disk controller for RAID systems
  • Copier/printer board control
  • MPC603e processor core
    • High-performance, superscalar processor core
    • Floating-point unit (selectable), integer, load/store, system register and branch processing unit
    • 16K instruction cache, 16K data cache
    • Lockable portion of L1 cache
    • Dynamic power management
  • Memory interface
    • 100 MHz memory bus capability
    • Programmable timing supporting either FPM DRAM, EDO DRAM or SDRAM
    • High-bandwidth bus (32/64-bit data bus) to DRAM
    • Supports one to eight banks of 4-, 16-, 64- or 128-Mbit DRAM
    • Supports 1 Mbyte to 1 Gbyte DRAM memory
    • Contiguous memory mapping
    • 16 Mbytes of ROM space
    • 8-bit, 32-bit, or 64-bit ROM
    • Supports bus-width writes to flash
    • Read-modify-write parity support (selectable)
    • ECC support (selectable)
    • SDRAM, DRAM buffer data-path
    • Error injection/capture on data path
    • LVTTL compatible
    • PortX: 8-, 32- or 64-bit general-purpose I/O port uses ROM controller interface with address strobe
  • 32-bit PCI interface operating up to 66 MHz
    • PCI 2.1 compatible
    • PCI 5.0 V tolerant
    • Support for PCI locked accesses to memory
    • Support for accesses to all PCI address spaces
    • Selectable big- or little-endian operation
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