The MSC8151 is the industry’s highest performance single-core DSP based on Freescale’s SC3850 StarCore technology with added performance from a multi-accelerator platform engine (MAPLE-B) for fast Fourier transforms (FFT) and inverse fast Fourier transforms (iFFT), discrete Fourier transforms (DFT) and inverse Discrete Fourier Transforms (iDFT), Turbo and Viterbi decoding. The MAPLE-B accelerator supports the advanced processing requirements and capabilities of high-end medical, aerospace and defense and advanced test and measurement markets. It delivers industry-leading performance, leveraging 45 nm process technology in a highly integrated DSP to provide performance up to 1 GHz. The MSC8151 helps equipment manufacturers create end products and services that integrate more functionality in a smaller hardware footprint.
Features
-
StarCore DSP SC3850 core subsystem with:
-
SC3850 DSP core at up to 1 GHz
-
512 KB unified L2 cache/M2 memory
-
32 KB I-cache, 32 KB D-cache
-
Fully programmable 1056 KB M3 shared memory (SRAM)
-
MAPLE-B - highly flexible programmable Turbo and Viterbi decoder supports configurable decoding parameters. It can perform up to 200 Mbps of Turbo decoding (six iterations) or up to 115 Mbps of K = 9 (zero tail) Viterbi decoding
-
Two DDR 2/3 64-bit SDRAM interfaces at up to 800 MHz data rate
-
Chip-level arbitration and switching system (CLASS), non-blocking, fully pipelined, low-latency interconnect fabric
-
High-speed interconnects
-
Dual x4/x1 Serial RapidIO® at 1.25/2.5/3.125 Gbaud
-
PCI Express® x4/x2/x1
-
Two SGMII
-
Dual RISC QUICC Engine supporting:
-
RGMII gigabit Ethernet ports
-
Serial peripheral interface (SPI)
-
TDM interface 1024 channels, four 256-channel ports at 62.5 Mbps per port
-
DMA engine 16 bidirectional channels
-
Other peripheral interfaces
-
UART
-
I⊃2;C
-
32 GPIO
-
16 timers
-
Technology
-
Process: 45 nm SOI
-
Voltage: 1-volt core, 2.5, 1.8/1.5-volt I/O
-
Package: FC-BPGA, 29 x 29 balls at 1-mm pitch, RoHS
-
This product is included in Freescale’s , with assured supply for a minimum of 10 years after launch
框图