Designed for engine management, the Qorivva MPC5566 32-bit embedded controller is the first device from Freescale's Qorivva MPC55xx family to integrate 3 MB of embedded flash memory, qualified for the harshest automotive environment and offering full read while write (RWW) capability. This provides developers with a cost-effective medium to support more sophisticated, memory-intensive timing and control functionality. Containing the Power Architecture® technology, the Qorivva MPC5566 is ideal for any application that requires complex, real-time control and it offers system performance of up to five times that of its MPC500 predecessors, with the reliability and familiarity of proven Power Architecture technology.
The Qorivva MPC5566 embedded controller is pin-and code-compatible with other members of the Qorivva MPC5500 family of scaleable powertrain controllers, allowing product developers to easily migrate up to the industry's first 3 MB flash-embedded controller for next generation applications. This is particularly important as the need for increased fuel efficiency and improved emissions continues to rise. Automakers and their suppliers are relying more and more on greater semiconductor functionality to allow more advanced engine control systems to be deployed.
Features
Freescale's e200z6 Core
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High-performance 132 MHz 32-bit Power Architecture technology core with variable length encoding (VLE)
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Memory management unit (MMU) with 32-entry fully associative translation lookaside buffer (TLB)
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SPE (signal processing extension): DSP, SIMD and floating point capabilities
Memory
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3 MB of embedded flash memory with error correction coding (ECC) and RWW
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128 KB on-chip static RAM with ECC
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32 KB of cache (with line-locking) that can be configured as additional RAM
System
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Two enhanced time processor units (eTPUs), each with 32 I/O channels and 24 KB of designated SRAM
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64-channel eDMA (enhanced direct memory access) controller
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Interrupt controller (INTC) capable of handling 339 selectable-priority interrupt sources
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Frequency modulated phase-locked loop (FMPLL) to assist in electromagnetic interference (EMI) management
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MPC500 compatible external bus interface
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Nexus IEEE®-ISTO 5001 class 3+ multicore debug capabilities > 5/3.3V IO, 5V ADC, 3.3V/1.8V bus, 1.5V core
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416-pin PBGA package
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Temperature range: -40 to 125ºC
I/O
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40-channel dual enhanced queued analog-to-digital converters (eQADC)—each up to 12 bit resolution and up to 1.25 us conversions, six queues with triggering and DMA support
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Four deserial serial peripheral interface (DSPI) modules—16 bits wide up to six chip selects each
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Four controller area network (CAN) modules with 64 buffers each
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Two enhanced serial communication interface (eSCI) modules
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24-channel enhanced multiple I/O system (EMIOS) with unified channels
Included in Freescale’s product longevity program
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product longevity program with assured supply for a minimum of 15 years after launch
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