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LFD212G45DP3A140

厂商：
Murata
类别：
收发共用器
包装：
封装：
无铅情况/ROHS：
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产品名称：原装自家现货库存

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Targeting low-end engine management applications, the Qorivva MPC5534 is positioned as an ultra-low cost 32-bit microcontroller. It offers DSP capability, sophisticated timing control (eTPU and eMIOS), and variable length encoding (VLE) that improves code density up to 30% over the classic Power Architecture®. The Qorivva MPC5534 is ideal for any application that requires complex, real-time control. It offers system performance along with the reliability and familiarity of the proven Power Architecture. The Qorivva MPC5534 helps you control costs while designing for increasingly complex applications. This high-performance MCU delivers more on-chip functionality than the current MPC500 family including a large block of embedded flash, enhanced timer systems and a peripheral set specifically tailored for automotive and industrial applications. The Qorivva MPC5534 offers a migration path from the market-leading MPC500 family of 32-bit MCUs, facilitating reuse of legacy software architectures.


Features


Freescale's e200z3 Core + VLE
  • High-performance 80 MHz 32-bit Power Architecture core with VLE
  • Memory management unit (MMU) with 16-entry fully associative translation lookaside buffer (TLB)
  • SPE (signal processing extension): DSP, SIMD and floating point capabilities

Memory
  • 1 MB of embedded flash memory with error correction coding (ECC) and read while write capability (RWW)
  • 64 KB on-chip static RAM with ECC system

System
  • One enhanced time processor units (eTPUs) with 32 I/O channels and 14.5k of designated SRAM
  • 32-channel eDMA (enhanced direct memory access) controller
  • Interrupt controller (INTC) capable of handling 210 selectable-priority interrupt sources
  • Frequency modulated phase-locked loop (FMPLL) to assist in electromagnetic interference (EMI) management
  • MPC500 compatible external bus Interface
  • Nexus IEEE®-ISTO 5001 class 3+ multicore debug capabilities
  • 5/3.3V IO, 5V ADC, 3.3V/1.8V bus, 1.5V core
  • 208-pin MAPBGA and 324-pin PBGA package options
  • Temperature Range: -40 to 125ºC

I/O
  • 40 channel dual enhanced queued analog-to-digital converter (eQADC)—up to 12 bit resolution and up to 1.25ms conversions, six queues with triggering and DMA support
  • Three deserial serial peripheral interface (DSPI) modules-16 bits wide up to six chip selects each
  • Two controller area network (CAN) modules with 64 buffers each
  • Two enhanced serial communication interface (eSCI) modules
  • 24-channel enhanced multiple I/O system (EMIOS) with unified channels

Development Tools
  • A comprehensive suite of hardware and software development tools is available to help simplify and speed system design
  • Development support is available from leading tools vendors providing compilers, debuggers and simulation development environments

Included in Freescale’s product longevity program
  • product longevity program with assured supply for a minimum of 15 years after launch

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